Devices¶
Devices and I/O Overview¶
- Devices (a.k.a. peripherals) are how a computer receives input from and produces output for the outside world.
- Bus: a communication pathway between various components of a computer
- internal bus: (a.k.a. memory bus) is for communication between the processor and main memory. It is fast and close to the processor(s).
- peripheral bus: (a.k.a expansion bus) allows devices in the computer to communicate.
- There are 3 primary types of device registers
- status: tells you something about the device’s current state. Typically, a status register is read
- command: issue a command to the device by writing a particular value to this register.
- data: used to transfer larger blocks of data to/from the device.
- If a write is in progress, the device exhibits undefined behaviour if another write is attempted. I.e. you don’t really know what will happen.
- IRQ stands for interrupt request.
- Example:


- A device driver is a part of the kernel that interacts with a device.
- A significant portion of an OS are the device drivers. Communication happens by reading from or writing to the command, status and data registers.
- Two methods for interacting with devices are
- Polling: the kernel driver repeatedly checks the device status, which uses processor time
- Interrupts: the kernel does not wait for the device the complete the command. Instead, the request completion is taken care of by the interrupt handler, i.e., the device updates a status register to indicate whether or not it was successful and then generates an interrupt.
- A dynamically loadable device driver is one that can be added or removed while the kernel is running, i.e. a reboot is not required
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Access devices
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Port-Mapped I/O (PMIO):
Devices are assigned special port numbers, separate from the normal memory address space. The processor uses special assembly I/O instructions like
inandout(in x86/x64) to move data between CPU registers and device ports. This method requires dedicated I/O instructions and is managed in a smaller address space. -
Memory-Mapped I/O (MMIO):
Each device register is mapped directly to a physical memory address, so the device appears like part of the regular memory. The CPU can use normal memory instructions (
load,store) to read or write device registers, just like accessing regular RAM.
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The main difference between Program-Controlled I/O (PIO) and Direct Memory Access (DMA) lies in who performs the data transfer. In PIO, the processor (CPU) is actively involved — the device driver uses the CPU to transfer data between memory and the device using special I/O instructions or memory-mapped I/O. This consumes CPU time and resources. In contrast, DMA allows the device itself to transfer data directly to or from memory without involving the CPU. The processor is free to perform other tasks while the transfer happens in the background. DMA is generally used for large block transfers, like moving data between a disk controller and main memory, making it more efficient for high-throughput I/O.
Hard Drives¶
- Platters: These are circular disks coated with a magnetic material where data is stored. Each platter has two surfaces, and all platters in a drive spin together on a central spindle, typically rotating at 6,000 to 15,000 RPM. Because of this high-speed rotation, data can be accessed as the correct part of the disk surface passes under the read/write head. However, due to minor variations in speed over time, the exact position of the platter becomes unpredictable after many revolutions (100–200), which makes precise timing difficult.
- Disk Arm Assembly (Actuator Arm): This is a movable arm with read/write heads — one for each surface of every platter. All arms are connected and move in unison, pivoting to position the heads over the correct track (a concentric ring of data). The heads float just above the spinning platters and perform the actual reading and writing of data. The pivot that controls arm movement provides some protection against physical shocks that could otherwise cause misalignment or damage.
- Each surface of a hard disk has its own read/write head mounted on a shared actuator arm, which moves all heads together to access the same position across all platters. Data is organized in concentric circles called tracks, and the set of tracks at the same radius on all surfaces forms a cylinder. Read/write heads operate one cylinder at a time, typically with only one head active due to shared circuitry and to prevent electrical interference (crosstalk). Aligning multiple heads precisely is difficult, so they move together to ensure accurate access.
- The time it takes to move the arm to the correct cylinder is called the seek time.
- The seek time is the duration it takes for a hard drive’s actuator arm to move the read/write head to the correct cylinder. A seek can have up to four phases: speedup, where the arm accelerates; coast, where it moves at top speed (used only for long seeks); slowdown, where it decelerates near the destination; and settle, where the head fine-tunes its position to align exactly with the desired track. Very short seeks are mainly limited by the settle time, which is around 1 millisecond. Short seeks (200–400 cylinders) are dominated by the acceleration phase, with arms reaching accelerations of up to 40 times the force of gravity (40g). Each phase plays a role depending on how far the arm needs to move, with long seeks including all four phases and short ones possibly skipping coast or slowdown.
- Switching between read/write heads can take about as long as a short seek and might need minor adjustments. Writes generally take longer to settle than reads because while a misaligned read can be corrected with checksums and retries, a misaligned write can cause irreversible data loss by overwriting adjacent tracks. The disk controller uses a table that maps seek distances to the motor power and time needed, interpolating values as necessary. This table is maintained through periodic thermal recalibration, as temperature affects mechanical performance, though frequent recalibrations can degrade responsiveness. Lastly, the “average seek time” used in this course refers to one-third(1/3) of the maximum seek time—not the time to move across one-third of the disk’s radius.
- Modern disks use logical block addressing (LBA), presenting storage as a simple array of 512-byte blocks rather than exposing the older physical CHS layout. Internally, the disk controller maps these logical blocks to physical locations using techniques like zoning (more sectors on outer tracks), track skewing (offsetting track starts to help sequential access), and sparing (replacing bad sectors). The kernel does not know this mapping, so while a bigger logical block difference usually means a longer seek, the actual time varies in a non-linear way. Though the OS lacks precise positional data, it can still build tables to estimate seek times based on observations.
- Generally 512 bytes is written atomically, even if there is a power failure.
- Seek Time
- Time to move the arm to the right cylinder.
- Depends on the distance between the current and requested position.
- Ranges from 0 ms (no movement) to the disk’s maximum seek time.
- Maximum seek time refers to the longest time it takes for the disk arm to move from one end of the disk to the other, i.e., from the innermost track to the outermost track (or vice versa).
- Rotational Latency
- Time waiting for the desired block to rotate under the read/write head.
- Depends on the rotation speed
- Ranges from 0 ms to 1 full rotation.
- Maximum rotational latency is the time it takes for one full rotation of the disk.
- Transfer Time
- Time to actually read or write the block(s) once they’re under the head.
- Depends on:
- The disk’s rotation speed, and
- The size of the data being transferred (number of blocks).
- Usually the smallest of the three components.
- Request Service Time Formula:
Request Service Time = Seek Time + Rotational Latency + Transfer Time
- The disk controller manages hardware access and interacts with the processor over a bus like SATA or NVMe. It supports features that boost performance, such as command queueing, which allows it to optimize the order of requests based on current head and disk rotation position. Disks also use internal cache for read-ahead to improve sequential read speed and write caching to accelerate writes, although this carries the risk of data loss if the disk crashes before the cached data is committed.
- Read-ahead is a disk performance optimization technique where the disk (or OS) predictively reads extra data blocks before they are explicitly requested — typically during sequential access.


to the correct cylinder, while rotational latency handles sector alignment
Disk Scheduling¶
- Sequential access is much faster than random access. Try to order requests to minimize seek times.
- First Come First Served (FCFS): Process the disk requests in the order they are received.
- Pros: easy to implement; good fairness
- Cons: cannot exploit request locality to minimize seek time; because seek time is not minimized, this method has increased average latency and decrease throughput
- Shortest positioning time first (SPTF), a.k.a. Shortest Seek Time First (SSTF): Always pick the request with shortest seek time.
- Pros: exploits the locality of disk requests (i.t. requests that are near each other)
- Cons: starvation, a block that is far away from the other requests may never get processed. The system does not always know which requests will be fastest because the drive speed drifts slowly over time
- Improvement: Aged SPTF
- Give older requests higher priority
- The “effective” seek time (T_eff) is based on the seek time from the current position (T_pos) minus the time it has been waiting times a weighting factor (w · T_wait): T_eff = T_pos − w · T_wait
- Elevator scheduling a.k.a. SCAN: Sweep across the disk and service all requests as you approach that track. Switch directions only if there are no further requests in that direction.
- Like SPTF, but the next seek must be in the same direction
- SCAN means the disk arm sweeps linearly across tracks in one direction, servicing requests at tracks that need it. It doesn’t stop at every track, and it doesn’t wait for a full rotation unless necessary for a specific request.
- Pros: takes advantage of locality of requests; provides bounded waiting
- Cons: tracks in the middle get better service because they are serviced in both directions
- C-SCAN: Only sweep in one direction and then return to the beginning again. After reaching the end, it jumps back to the beginning without servicing requests.
- Pros: Gives fairer service across all tracks – no middle track bias.
- Cons: The head must move all the way back to the start without doing work (wastes seek time).
Flash Drives¶
- Solid State Drives (SSD)
- Key Point: Use electronic circuits rather than a spinning disk ⇒ no mechanical parts.
- DRAM (dynamic RAM, commonly called RAM) requires constant power to store data, but flash memory uses the quantum properties of electrons to store a charge.
- Flash memory is divided into blocks, which are in turn subdivided into pages.
- For flash memory, reads and writes occur at the (smaller) page level.
- Pages are initialized to 1’s
- The transition 1 → 0 can occur at the page level
- But overwriting and deleting must be done at the (larger) block level.
- A high voltage is required to switch 0 → 1. Can only apply high voltage at the block level
- Writing and Deleting from Flash Memory

- SSD blocks have a limited number of write-erase cycles before they wear out and become unreliable—typically around 1,000 cycles for consumer SSDs and up to 1,000,000 for enterprise ones. To prevent certain blocks from wearing out faster than others due to repeated use, SSDs use a technique called wear leveling. This technique spreads write operations evenly across all blocks in the drive, ensuring that all blocks age at a similar rate and prolonging the overall lifespan of the SSD.
- So instead of always writing to the same block, the controller moves data around behind the scenes to balance the wear.
- There are four main types: SLC (single-level cell) stores 1 bit using 2 charge levels, MLC (multi-level) stores 2 bits with 4 levels, TLC (triple-level) stores 3 bits with 8 levels, and QLC (quad-level) stores 4 bits with 16 levels. As you increase the number of levels per cell, you can store more data using less physical space, reducing cost per GB. However, more levels also mean slower read/write performance and reduced endurance because distinguishing between more charge levels is harder, and the cells degrade faster—similar to how rechargeable batteries lose capacity with repeated use.